Thursday, November 1, 2012
Got up at eight o'clock in the morning. Ate a bowl of noodle soup for lunch, and a dish of Italian pasta for dinner.
Indeed, there are many types of household items containing hazardous materials in the house. To give examples, some sorts of batteries, fuels, medicines, cleaning materials, insecticides, and dissolvent are potentially hazardous, as well known.
In the semiconductor industry, arsenic has been used as a dopant in order to tune the electronic properties of the semiconductor materials in the devices on a chip for the last decades. It seems that because only a very small amount of the arsenic ions are implanted in the semiconductor devices in general and the implanted arsenic atoms are held with the covalent bond in the solid-state substrates firmly, the influence on the environment due to the disposal of the electronic items should be less than that due to the disposals of other hazardous household items listed above.
Anyway, the completeness of putting out rubbish after separating them should fix this issue.
Friday, November 2, 2012
Got up at seven forty-five in the morning. Ate a bowl of rice porridge for lunch, and a Japanese meal for dinner.
Basically, the transistor design for the SRAM should be similar to that for the logic. The gate lengths, gate widths, and threshold voltages of the SRAM transistors should be readjusted for the purpose of the optimization of the SRAM bit cell in terms of the read and write margins, the cell current, and so on. With further scaling-down, an idea to increase the capacitances at the storage nodes composed chiefly of one side of both the S/D junction capacitance and the miller capacitance of the load transistor, that of the drive transistor, and that of the pass transistor of the 6T-SRAM cell, which is designed to be minimal for the logic, without a high cost in the process complexity might be necessary.
At the 2006 IEDM, Stanford University reported their unique SRAM cell namely 'Nonvolatile SRAM Cell' that has two additional NVM devices connected to two storage nodes of the SRAM cell respectively. It retains data when the power supply is off. For the embedded SRAM application, the complexity in the process integration by adding the NVM devices between Metal-1 and Metal-2 may be unfavorable though there is no area penalty.
Saturday, November 3, 2012
Got up at nine forty-five in the morning. Ate a bowl of noodle soup for lunch, and a dish of Italian pasta for dinner. Stayed at home for the entire day.
Sunday, November 4, 2012
Got up at eight forty-five in the morning. Ate a bowl of rice porridge for lunch, and a dish of Italian pasta for dinner. Stayed at home for the entire day.
Monday, November 5, 2012
Got up at seven forty-five in the morning. Ate a bowl of noodle soup for lunch, and a Japanese meal for dinner.
The transistor design for the SRAM bit cell embedded in a region of the chip that is composed of multiple-fin FinFETs may be categorized into two major types. Its transistor design should depend upon whether the channel doping is present or not and whether the body-tie is present or not. It adds only a few process steps to the process integration flow. Anyway, it isn't a troublesome matter.
Tuesday, November 6, 2012
Got up at eight o'clock in the morning. Ate a bowl of rice porridge for lunch, and a dish of Italian pasta for dinner.
Year by year, the growing difficulty in the scaling down of the device dimensions for both the logic and the memory applications has been advancing not only the device design but also the application of the new materials to the channel, the gate, the gate dielectric film, the insulating dielectric film, the storage capacitor, the other memory stacks and so on. In accordance with the scaling down of some critical dimensions of the device to about 15 angstroms and below, understanding and managing the quantum effects have become unignorable, and making practical use of them has attracted growing interest in the field of the developments of the new devices.
Wednesday, November 7, 2012
Got up at seven forty-five in the morning. Ate a bowl of rice porridge for lunch. Went out shopping at a grocery store this evening. Ate pieces of California Pizza Kitchen's pizza for dinner.
About a few weeks ago, my wife and I talked about the movie entitled 'Kagemusha' in the living room of our house. For some reason or other, the first page of the results of the Bing search engine for my name 'Yasuhito Shiho' indicated several strange images next to my photo image at bing.com/images today. Those were the images of the posters used for the advertisements of the movie 'Kagemusha' about thirty years ago. The Bing search engine didn't show them yesterday. To the best of my memory, it has never shown them before.
I felt as if a US capitalist group had been imposing on me its opinion by showing those images. The opinion they were imposing on me might be that we wanted to continue seeing the muppet show. That concurrence might be just a coincidence.
If that wasn't a coincidence, somebody still has been listening to our conversations in our house. It's terribly annoying.
Thursday, November 8, 2012
Got up at seven forty-five in the morning. Ate a bowl of noodle soup for lunch, and a Japanese meal for dinner.
According to the tables comparing the Ivy Bridge and the Sandy Bridge processors of Intel Corp. found on a website, the power consumption of a processor of the Ivy Bridge series is nearly half of that of the corresponding processor of the Sandy Bridge series 'for the same performance'. It means that Intel Corp. tuned the characteristics of its Ivy Bridge processors predominantly to low-power applications such as mobile gadgets, the market of which has been expanding rapidly.
In general, the low power consumption of the processor can be attained by applying some methods, e.g. lowering the supply voltage, lowering the gate capacitances and other capacitances, lowering the transistor off-currents, advancing the circuit technologies, advancing the device and process technologies. In accordance with following the scaling rule, the supply voltage may be reduced. The use of the Tri-Gate device, which is a kind of the FinFET, allows lowering the gate capacitances by reducing the gate length in proportion to the scaling rate, though its 3D device structure slightly increases the parasitic capacitances. Probably, the off-currents of Intel's Tri-Gate transistors were set to be lower than those of the 2D planar transistors of the previous generation.
The above facts clearly suggest that Intel's Ivy Bridge processors should be considerably faster than its Sandy Bridge processors 'for a given same power consumption'. This can be easily accomplished by adjusting the off-currents of the transistors and/or the supply voltage of the chip.
Because of the excellent scalability of the multiple-gate configuration of the Tri-Gate and the FinFET, for future technology generations, the sizes of the transistors can be scaled down by thinning the fin thickness, differently from the 2D planar transistors. The continuous reduction in the gate capacitances and some amount of the gain in the drive currents, especially of the pMOSFET, can be expected with scaling down the device dimensions. By virtue of the improvement in the short channel behavior with thinning the fin, the minimum gate length of the Tri-Gate and the FinFET can be scaled down from the current value of 22 ~ 25nm gradually each technology generation and finally, it may be scaled down to the 9 ~ 6nm range. The excess tunneling current through the built-in potential barrier from the source to the channel is believed to decide the scaling limit of the MOSFETs, depending on the doping concentrations, the S/D junction abruptness, and the supply voltage, as known. It seems that the position of the Tri-Gate and the FinFET will be secure in terms of the transistor design and scaling for the next decade or longer.
The Ge p-channel may be adopted in this period of time. The compound semiconductor material may also be used not only for the n-channel but also for the p-channel after that. The integrated optical interconnect, the graphene FET or other more advanced or aggressive technologies will be necessary when the gate length scaling of the MOSFETs hits the next difficulty in the near future.
Friday. November 9, 2012
Got up at seven forty-five in the morning. Ate a bowl of rice porridge for lunch, and a dish of Italian pasta for dinner.
Saturday, November 10, 2012
Got up at nine o'clock in the morning. Ate a bowl of noodle soup for lunch, and a dish of Italian pasta for dinner. Stayed at home for the entire day.
Sunday, November 11, 2012
Got up at nine o'clock in the morning. Ate a bowl of rice porridge for lunch, and a Japanese meal for dinner. Stayed at home for the entire day.
Monday, November 12, 2012
Got up at seven forty-five in the morning. Ate a bowl of noodle soup for lunch, and a Japanese one-pot meal for dinner.
Tuesday, November 13, 2012
Got up at seven forty-five in the morning. Ate a bowl of rice porridge for lunch, and a Western-Japanese meal for dinner.
The single-gate thin film SOI MOSFET can be another choice of the device technologies that allows scaling the gate length from the current value of 20 ~ 25nm down, probably to the10 ~ 20nm range. Because the single-gate requires a much thinner body than the double-gate and the triple gate do for a given short channel controllability, its gate length scaling may be limited by the other factors, e.g. the mobility degradation due to additional scatterings from the back interface. When the single-gate SOI MOSFET is equipped with the elevated S/Ds in order to recover the conductance in the S/Ds, a small amount of the parasitic capacitance will be undesirably added, as seen in the Tri-Gate and FinFET. In terms of the mobility enhancement with the stress engineering, it seems that the 3D multiple-gate structure such as the Tri-Gate and the FinFET is more beneficial than the planar single-gate structure.
Wednesday, November 14, 2012
Got up at seven forty-five in the morning. Ate a bowl of noodle soup for lunch. Went out shopping at a grocery this evening. Ate pieces of California Pizza Kitchen's pizza for dinner.
Thursday, November 15, 2012
Got up at seven forty-five in the morning. Ate a bowl of rice porridge for lunch, and a Japanese meal for dinner.
In the BiCMOS technology, the bipolar transistors are connected to the output buffer of the logic composing of the MOSFETs in order to boost their Vout driving performance. The simple analytic equation of t = CV/I allows us to estimate roughly the propagation delay of the logic circuit representing the circuit speed. Although the BiCMOS technology doesn't improve the drive current of the MOSFETs in the chip, the high drive current of the bipolar transistor connected to the output buffer of the logic boots the drive current of the logic that can correspond to I of the above equation, so that the propagation delay of t can be improved. However, the supply voltage V should be kept higher to obtain the advantage in the speed. The requirement of a high supply voltage for the BiCMOS imposes restraint on scaling down the size of the MOSFETs and then their gate capacitance, which is the most dominant in the MOSFET capacitances. Therefore, both V and C of the above equation can't be reduced without raising the risk of some reliability problems related to the hot carriers generations. On the other hand, in low voltage applications such as state-of-the-art high performance and low power processors, the reliability issues related to the hot and tunneling carriers generations should be of small importance because of the supply voltage set to be lower than 1.1V (Si Band Gape = ~ 1.1eV) considerably.
The other simple analytic equation of P = Pc + Ps + Pl = fCV^2 + Ps + Pl allows us to estimate roughly the power consumption of the CMOS logic, where the term P is the total power consumption per logic, the term Pc is the power consumption due to the charge and discharge of the capacitances including the gate capacitance, the term Ps is that due to the transient current through the logic during operation, the term Pl is that due to the subthreshold leakages and the junction leakages and the term f is the frequency. Because the scaling down of both V and C is limited, the power consumption of the BiCMOS can't be easily improved with any conventional method. The addition of the bipolar transistor, which consumes a higher power than the MOSFET does, to the logic, should also worsen its power consumption.
Overall, the BiCMOS allows us to improve the speed of the circuit while requiring a larger chip size and degradation in the power consumption, but without requiring so difficult process technologies. In general, the BiCMOS and the HBT are appropriate for high-voltage analog, RF, and power applications.
Friday, November 16, 2012
Got up at eight o'clock in the morning. Ate a bowl of noodle soup for lunch, and a dish of Italian pasta for dinner.
I believe that the surest way to keep an idea confidential is to memorize it without writing down it on the pages of the notebook or the computer file.
In this case, some kind of attempt that involves the use of one's brain to prevent senility may be necessary. For the purpose of it, I read some theoretical physics books in English for about an hour every late evening. Probably, it's working well. This sort of book typically describes an adequate number of highly logical matters. Understanding highly logical matters in one's nonnative language should stimulate one's brain and might somewhat rejuvenate it. Contrary to one's wish to improve the faculty of memory, cramming too much knowledge may lead to lapses of memory stored in one's brain once.
BTW, I don't like cigarette smoke. To be honest, I hate such sticky and stinky carcinogenic smoke. I have a hearty dislike for illegal drugs including marijuana.
Don't take any illegal drugs. Those stuffs don't make the user creative but make the user just unusual or insane. Habitual use of some sort of them can ruin the addict, as well known.
Saturday, November 17, 2012
Got up at ten o'clock in the morning. Ate a bowl of rice porridge for lunch, and a Japanese-Western meal for dinner. Stayed at home for the entire day.
I choose the theoretical physics books, taking their difficulty into consideration. Those are the books either dealing with topics slightly advanced in theory from what I currently comprehend or using the technical terms in English that I need to become accustomed to. As written several months ago, the books I would read next time have already been decided. Compared to the integrated circuit, this effort may correspond to the developments of the performance logic devices and the logic circuit design with some fuzziness in my brain
By reading many technical papers dealing with the semiconductor device and processes, I have tried to gain knowledge in this field, as much as possible. My knowledge in this field has to be refreshed regularly to continue keeping it in mind. Compared to the IC, this effort may correspond to the extension of and the memorization of dynamic random-access memories. Unlike the DRAM, it's obvious that the human brain doesn't need so frequent refresh.
I set my sights on remembering vaguely other things because of the reason I wrote yesterday. If one remembers a fragment of knowledge, one can easily look it up in detail when necessary. However, it seems that cramming too much detailed knowledge leads not only to lapses of memory from one's brain but also to limit one's creativity and imagination. This effort may correspond to the memorization of the old-fashioned hard disk with encryption. Obviously, this isn't a nice simile because one's memories are not nonvolatile. I don't think there is any backup system available for the memories in the human brain.
Sunday, November 18, 2012
Got up at ten forty-five. Ate a bowl of noodle soup for lunch, and a dish of Italian pasta for dinner. Stayed at home for the entire day.
Without making any note, my own new ideas related to science and technology should be stored in the area of my brain that I metaphorically described as the DRAM yesterday. So, the periodical refreshments should be necessary.
Any other things, such as the summaries of science and technology, the opinions on current events, and the everyday occurrences, can be written down on the pages of the notebook or the computer file safely.
Today, I would like to mention my liking of the pictorial arts below. The picture I have a penchant for is a sort of Realist paintings and Impressionist paintings. This is neither just a realistic drawing from nature nor an impressive drawing from nature with the introduction of the virtual effects shifting light and color and other effects. The main subject matter of my favorite painting should be decided, based on an idea, a story, a poem, or a message. The construction of it should be built while reflecting an excellent sense of abstract art. With an artist's imagination, body and substance are given to the abstract. The finished painting may have the details to the level of the Realist painting or the Impressionist painting. I would like to decorate the rooms of our house with that sort of original painting with warm colors.
Although the choice of the materials and tools for it isn't so important, traditional oil painting is most pleasant for me. It seems that the picture art that is drawn by using leading-edge computer software has high potential.
Monday, November 19, 2012
Got up at seven forty-five in the morning. Ate a bowl of rice porridge for lunch, and a Japanese one-pot meal for dinner.
My idea to minimize the undesirable influence of the additional parasitic capacitances attendant upon the 3D device structure of the FinFET on the circuit performance by adopting the low-k insulating dielectric material and by optimizing the device design came to mind one day in 2005. I have never discussed this issue with anyone. In the middle of the 1990s, I knew the existence of the low-k insulating dielectric material for general purposes as a general knowledge in this area. However, I had never seen any document about this issue specifically for the reduction of the FinFET parasitic capacitances and had never met anyone who talked about it in those days.
A synoptic concept of it was written down in my diary in September 2009 because I believed that it was obvious. The other reason was that I was disappointed to read some of the technical papers about the FinFET published in 2008. However, the transistor design for the FinFET that allows us to reduce significantly the parasitic capacitances on the top of the multiple-fin FinFETs, without relying on the Tri-Gate structure, has never been described on any page of my notebook or computer file. Anyway, it isn't a difficult one.
BTW, a possibly ineffective way to reduce the parasitic capacitances on the top of the multiple-fin FinFETs was briefly described in the PowerPoint file made for my daily practice in English speech. Needless to say, the transistor design above was not included in this file or any other file, as written. Again, it isn't difficult.
Tuesday, November 20, 2012
Got up at seven forty-five in the morning. Ate a bowl of noodle soup for lunch, and a dish of Italian pasta for dinner.
The strength of creativity is something one was born with. I don't know whether one's creativity can be effectively developed with any education or not. To be honest, I have never received such an education from kindergarten through graduate school in my life. Such an education is very rare in Japan. It seems as if the education that I was familiar with e.g. rote learning, compulsion without any explanation, and regiment-style education might be designed to detract from a natural gift of creativity rather than to develop it. However, I don't deny them for the primary and secondary education levels unless it goes to excess.
When no hindrance is placed in one's way, the capability of the gifted person should become enlightened in due course in higher education or later. Although its effectiveness is uncertain, the education to develop liberal thinking in the limited academic areas should be necessary for ordinary people in high education.
BTW, the science university that I graduated from more than two decades ago now is known to give many students failing marks of D frequently. At each examination for promotion, about twenty to thirty percent of all students with a major in Physics weren't allowed to move up to the next grade those days. I'm not sure whether the academic atmosphere emphasizing the discipline of the university is still active or not. The technology institute where I acquired a Master of Science degree was known to boast one of the most advanced facilities in Japan. The following figures are the soft copies of my grade transcripts.
Wednesday, November 21, 2012
Got up at eight o'clock in the morning. Ate a bowl of rice porridge for lunch. Went out shopping at a grocery store this evening. Ate pieces of California Pizza Kitchen's pizza for dinner.
Thursday, November 22, 2012
Today is Thanksgiving Day. Got up at eight o'clock in the morning. Ate a bowl of noodle soup for lunch. Had California red wine with a Western-Japanese meal for dinner. Stayed at home for the entire day.
The choice of the materials and tools for the pictorial arts isn't so important to me. As known, the photograph is one of these choices, but the value of the still photograph is perceived to be rather different from that of any other pictorial art in terms of the tendency toward the scoop. In the area of the news photograph, any fabrication of the subject matter of a photograph is prohibited and at least disliked on most occasions. Because of the influence of the policy in the news photograph area and/or the protectionism for the value of the existing landscape and portrait realist paintings, even in the area of the art photograph, the choice of the man-made subjects fabricated only for the purpose of photographing and the use of the artificial effects on the original post photographing is considered to be unfavored thought there exist many counterexamples to it in contemporary arts such as pop art paintings. I feel be put to rather inconvenienced in the area of art photography, to be honest. However, I don't dislike taking our souvenir photographs at the tourist spots. I prefer to admire the scenery with my naked eye at the actual place rather than to look at its photograph displayed on the wall daily.
On the other hand, the motion picture has been very active in a liberal atmosphere. This is probably because it's a newer field of art given birth in the late part of the nineteenth century. Only in the documentary films and the news programs, any fictional factor was under a taboo. For the other cases, every possible creative activity has been welcomed and has been given a trial unless it violates any ethical code. In modern times, this is what the majority of people have been enjoying to their hearts' content on television at home, on the computer through the Internet, and on the silver screen at a movie theater. The movie has been often regarded as a typical composite art that integrates pictorial art, acting, literature, music, architecture, dancing, costume art, cinematographic and editing technologies, and so on.
Friday, November 23, 2012
Got up at eight o'clock in the morning. Ate a bowl of rice porridge for lunch, and a dish of Italian pasta for dinner.
The yield enhancement has become more difficult with advancing the integrated circuit from technology generation to generation. Moreover, the conversion of the 2D device structure into the 3D device structure in order to scale the gate length of the MOSFETs down below 25nm requires some additional process steps tightly controlled to form the channels vertical to the wafer plane in the manufacturing processes. Therefore, the improvement of the controllability of all processing steps in the fab, especially the photolithography and the etching, should be becoming more important, as guessed easily.
In terms of the carrier mobility enhancement with stress engineering, the 3D multiple-gate structure such as the Tri-Gate and the FinFET is more beneficial than the 2D single-gate structure, as written several days ago.
These factors above were the reasons why I said over the telephone about four years ago that I wouldn't mind being involved in yield enhancement in the future and the stress engineering would still be one of the most important factors for the scaled Si devices. My comment above also suggested that I was capable of acting flexibly, from the basic research to the yield enhancement of a product. From reading through my publications, my belief that the multiple-fin FinFET would be a promising device structure for further transistor scaling should be obvious.
BTW, to my knowledge, the use of the 3D device structure instead of the 2D device structure doesn't bring on any problem with the reliability of the transistor characteristics, especially when the supply voltage is kept low.
Saturday, November 24, 2012
Got up at eight forty-five in the morning. Ate a bowl of noodle soup for lunch, and a Western-Japanese meal for dinner.
Sunday, November 25, 2012
Got up at ten-thirty in the morning. Ate a bowl of noodle soup for lunch, and a Japanese meal for dinner. Stayed at home for the entire day.
Monday, November 26, 2012
Got up at seven forty-five in the morning. Ate a bowl of rice porridge for lunch, and a dish of Italian pasta for dinner.
When the supply voltage is kept considerably below 1.1V, the reliability of the characteristics of the Si devices in the front-end is of no serious consequence. However, the introduction of a new material to the channel and/or the gate stacks of the devices should raise awareness concerning the necessity for its reliability each time. Some materials make the reliability better than the Si and SiO2, and others make it worse.
For example, the replacement of the very reliable gate dielectric film of the SiO2 by the high-k gate dielectric such as HfO2, HfSiO, HfSiON, and ZrO2 may have caused a problem in its reliability related to the interface states generation and charge trapping under a certain bias condition, though the problem was somewhat alleviated by leaving the thin SiO2 or SiON layer between the Si channel and the high-k gate dielectric and relying on other techniques. Let's add two other examples. Because the energy band gap of the Ge is about 0.66eV, the adoption of it as the channel material should require the evaluation of its reliability issues during the period of its development. Probably, the reliability of a novel compound material for the memory stacks of the memory cell should be an important matter.
Tuesday, November 27, 2012
Got up at eight o'clock in the morning. Ate a bowl of noodle soup for lunch. Went out shopping at a grocery store this evening. Had a pint of Guinness with pieces of Central Market's pizza for dinner. Both my wife and I had to do what we didn't like to do over the international telephone this afternoon. To take our minds off things, we drank some beer, though today is neither a holiday nor an anniversary.
Wednesday, November 28, 2012
Got up at eight o'clock in the morning. Ate a bowl of rice porridge for lunch. Went out shopping at some grocery stores this evening. Ate a Japanese meal for dinner.
My wife and I have never bought any lottery since 2006. This is mostly because we are unable to enjoy it under the existing circumstances. I've never gambled since 1995 until now, except for lotteries bought for the purpose of the expulsion of spies, buggers, wiretappers, and hackers possessing evil spirits in 2006.
Thursday, November 29, 2012
Today is my wife's birthday. Got up at eight o'clock in the morning. Ate a bowl of noodle soup for lunch, and had a pint of Guinness with a Western-Japanese meal for dinner.
Friday, November 30, 2012
Got up at eight-fifteen in the morning. Ate a bowl of rice porridge for lunch, and a dish of Italian pasta for dinner.
